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RP2040 simulation: Seeed Studio XIAO

Run RP2040 firmware in Sim86. Open a multi-controller example, learn how to start the second core, and collect simulation logs.

Seeed Studio XIAO RP2040 board

The Seeed Studio XIAO RP2040 is a compact microcontroller board built around the Raspberry Pi RP2040 dual-core ARM Cortex-M0+ chip. It features a USB-C connector, an onboard NeoPixel RGB LED, and 14 I/O pins in a stamp-form-factor footprint.

Open two controllers sharing a bus to inspect an RP2040 communicating alongside an ESP32-C3. The simulation examples guide also links a larger RP2040 workload.

Need a specific peripheral or behavior for your firmware? Contact us to discuss your requirements.

The full RP2040 datasheet is available here. It covers the complete GPIO function table, memory map, peripheral register descriptions, and clock tree.

The RP2040 has two Cortex-M0+ cores. CPU1 is halted by default. Firmware that launches it via the SIO FIFO bootrom entry sequence will start it and both cores run concurrently.

ChannelDescription
RTTSEGGER Real-Time Transfer log output. Requires the _SEGGER_RTT control block symbol to be present in the ELF.
USB CDCLines written to the virtual USB serial port. Firmware must wait for DTR assertion before sending or output during early boot will be lost.

Both channels feed the terminal panel in real time.

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